h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 35
h8s-2158
Manufacturer Part Number
h8s-2158
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2158.pdf
(927 pages)
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Section 1 Overview
Figure 1.1
Figure 1.2
Section 2 CPU
Figure 2.1
Figure 2.2
Figure 2.3
Figure 2.4
Figure 2.5
Figure 2.6
Figure 2.7
Figure 2.8
Figure 2.9
Figure 2.9
Figure 2.10
Figure 2.11
Figure 2.12
Figure 2.13
Section 3 MCU Operating Modes
Figure 3.1
Figure 3.2
Section 4 Exception Handling
Figure 4.1
Figure 4.2
Figure 4.3
Section 5 Interrupt Controller
Figure 5.1
Figure 5.2
Figure 5.3
Figure 5.4
Figure 5.5
Figure 5.6
Pin Arrangement (TBP-112A: Top View)............................................................
Memory Data Formats .......................................................................................... 32
Instruction Formats (Examples)............................................................................ 44
Branch Address Specification in Memory Indirect Addressing Mode ................. 47
State Transitions ................................................................................................... 51
(Example of KIN9 to KIN0) ................................................................................. 86
Mode 0.................................................................................................................. 93
Internal Block Diagram ........................................................................................
Exception Vector Table (Normal Mode) .............................................................. 21
Stack Structure in Normal Mode .......................................................................... 21
Exception Vector Table (Advanced Mode) .......................................................... 22
Stack Structure in Advanced Mode ...................................................................... 23
Memory Map ........................................................................................................ 24
CPU Internal Registers ......................................................................................... 25
Usage of General Registers................................................................................... 26
Stack ..................................................................................................................... 27
General Register Data Formats (1) ....................................................................... 30
General Register Data Formats (2) ....................................................................... 31
Address Map (Mode 2) ......................................................................................... 62
Address Map (Mode 3) ......................................................................................... 63
Reset Sequence (Mode 3) ..................................................................................... 68
Stack Status after Exception Handling.................................................................. 70
Operation when SP Value Is Odd ......................................................................... 71
Block Diagram of Interrupt Controller ................................................................. 74
Block Diagram of Interrupts IRQ15 to IRQ0 ....................................................... 85
Block Diagram of Interrupts KIN9 to KIN0 and WUE15 to WUE8
Block Diagram of Interrupt Control Operation..................................................... 90
Flowchart of Procedure Up to Interrupt Acceptance in Interrupt Control
State Transition in Interrupt Control Mode 1........................................................ 94
Figures
Rev. 3.00 Jan 25, 2006 page xxxv of lii
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