h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 431
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h8s-2158
Manufacturer Part Number
h8s-2158
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2158.pdf
(927 pages)
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Notes: 1. Only 0 can be written, to clear the flag.
15.4
15.4.1
To use the WDT as a watchdog timer, set the WT/IT bit and the TME bit in TCSR to 1. While the
WDT is used as a watchdog timer, if TCNT overflows without being rewritten because of a
system malfunction or another error, an internal reset or NMI interrupt request is generated. TCNT
does not overflow while the system is operating normally. Software must prevent TCNT
overflows by rewriting the TCNT value (normally be writing H'00) before overflows occurs.
Bit
2
1
0
Bit Name Initial Value R/W
CKS2
CKS1
CKS0
2. When OVF is polled with the interval timer interrupt disabled, OVF = 1 must be read at
Watchdog Timer Mode
Operation
least twice.
0
0
0
R/W
R/W
R/W
Clock Select 2 to 0
Selects the clock source to be input to TCNT. The
overflow cycle for
enclosed in parentheses.
When PSS = 0:
000: /2 (frequency: 20.4 s)
001: /64 (frequency: 655.3 s)
010: /128 (frequency: 1.3 ms)
011: /512 (frequency: 5.2 ms)
100: /2048 (frequency: 20.9 ms)
101: /8192 (frequency: 83.8 ms)
110: /32768 (frequency: 335.5 ms)
111: /131072 (frequency: 1.34 s)
When PSS = 1:
000: SUB/2 (cycle: 15.6 ms)
001: SUB/4 (cycle: 31.3 ms)
010: SUB/8 (cycle: 62.5 ms)
011: SUB/16 (cycle: 125 ms)
100: SUB/32 (cycle: 250 ms)
101: SUB/64 (cycle: 500 ms)
110: SUB/128 (cycle: 1 s)
111: /256 (cycle: 2 s)
Description
Rev. 3.00 Jan 25, 2006 page 379 of 872
= 25 MHz and SUB = 32.768 kHz is
Section 15 Watchdog Timer (WDT)
REJ09B0286-0300
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