h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 658

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 18 Universal Serial Bus Interface (USB)
Rev. 3.00 Jan 25, 2006 page 606 of 872
REJ09B0286-0300
Figure 18.2 Operation on Receiving a SETUP Token (When Decode by the Slave CPU Is
Notes: 1. Set the EP0OTC bit of USECSR0 to 1, initialize FVSR0I and FVSR0O, clear the EP0ITS and EP0OTS bits of TSFR0 to 0,
Send an OUT data
handshake packet
packet (8 bytes)
Receive an ACK
2. Since a USBIA interrupt is only assigned to a SETUP interrupt, interrupt source determination process is not required.
Send a SETUP
token packet
USB Host
clear the EP0ITF and EP0OTF bits of TFFR0 to 0, and clear the EP0STL bit of EPSTLR0 to 0.
Send NAK to the slave CPU
not Required and When SETICNT = 0)
Send ACK to the host CPU
the slave CPU is required
data packet (8 bytes)
Command data decode
USB Function Core
Receive a SETUP
Receive an OUT
Check if decode by
token packet
or not
Write data to EP0O FIFO
Do not modify FVSR0O
Request an USBID
interrupt (EP0OTF)
Request an USBIA
interrupt (SETUP)
Automatically set
Core Interface
each flag *
1
indicating that the decode is
decode by the slave CPU is
the information to be stored
Read USBIFR0 and check
the TF interrupt occurrence
performed by the EP0OTS
required or not and modify
in the following sequence
Read TFFR0 and check
interrupt to be generated
Clear the SETUPF bit of
Clear the EP0OTF bit
the EP0OTF interrupt
Check if the command
Complete the USBIA
Complete the USBID
Store the information
interrupt processing
interrupt processing
interrupt processing
interrupt processing
Initiate the USBIA
Initiate the USBID
Read USBIFR0 *
Slave CPU
in user memory
of TFFR0 to 0
in user memory
USBIFR0 to 0
occurrence
2