h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 193

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

6.8
When this LSI accesses the external address space, it can insert a 1-state idle cycle (T
bus cycles when a write cycle occurs immediately after a read cycle. By inserting an idle cycle it is
possible, for example, to avoid data collisions between ROM with a long output floating time, and
high-speed memory and I/O interfaces.
If an external write occurs after an external read while the ICIS bit is set to 1 in BCR, an idle cycle
is inserted at the start of the write cycle.
Figure 6.20 shows examples of idle cycle operation. In these examples, bus cycle A is a read cycle
for ROM with a long output floating time, and bus cycle B is a CPU write cycle. In figure 6.20 (a),
with no idle cycle inserted, a collision occurs in bus cycle B between the read data from ROM and
the CPU write data. In figure 6.20 (b), an idle cycle is inserted, thus preventing data collision.
Address bus
Idle Cycle
Data bus
WR
RD
(a) No idle cycle insertion
T
1
Bus cycle A
Long output floating time
Figure 6.20 Examples of Idle Cycle Operation
T
2
T
3
Bus cycle B
T
1
T
2
Data collision
Address bus
Data bus
RD
WR
Rev. 3.00 Jan 25, 2006 page 141 of 872
T
1
Bus cycle A
T
(b) Idle cycle insertion
2
T
3
Section 6 Bus Controller
T
I
Bus cycle B
REJ09B0286-0300
T
1
I
) between
T
2