h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 598

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 17 I
9. Note on when I
10. Note on IRIC flag clearing when wait function is used
Rev. 3.00 Jan 25, 2006 page 546 of 872
REJ09B0286-0300
In a situation where the rise time of the 9th clock of SCL exceeds the stipulated value because
of a large bus load capacity or where a slave device in which a wait can be inserted by driving
the SCL pin low is used, the stop condition instruction should be issued after reading SCL after
the rise of the 9th clock pulse and determining that it is low, as shown in figure 17.24.
When the wait function is used in I
rise time of SCL exceeds the stipulated value or where a slave device in which a wait can be
inserted by driving the SCL pin low is used, the IRIC flag should be cleared after determining
that the SCL pin is low.
If the IRIC flag is cleared to 0 when WAIT = 1 while the SCL is extending the high level time,
the SDA level may change before the SCL goes low, which may generate a start or stop
condition erroneously.
SDA
SDA
IRIC
IRIC
SCL
SCL
2
C Bus Interface (IIC)
Figure 17.25 IRIC Flag Clearing Timing When WAIT = 1
2
C bus interface stop condition instruction is issued
SCL = low detected
V
9th clock
9th clock
V
Figure 17.24 Stop Condition Issuance Timing
IH
IH
SCL is detected as low
because the rise of the
waveform is delayed
[1] SCL = low determination
[1] SCL = low judgement
Secures a high period
Secures a high period
2
C bus interface master mode and in a situation where the
[2] IRIC clear
[2] Stop condition instruction issuance
Stop condition generation