h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 663

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Notes:
Figure 18.7 Operation on Receiving an OUT Token (EP2-OUT: Initial FIFO Is Full)
Send an OUT data
packet (8 bytes)
1. When an EP2TF interrupt is specified as a USBIB or USBIC interrupt according to the INTSELR0 setting, the corresponding interrupt occurs.
2. When an EP2TS interrupt is specified as a USBIB or USBIC interrupt according to the INTSELR0 setting, the corresponding interrupt occurs.
handshake packet
handshake packet
Send an OUT data
Receive an ACK
Re-transmission
Receive a NAK
packet (8 bytes)
Send an OUT
Send an OUT
token packet
token packet
In this case, if a USBIB or USBIC interrupt occurs, interrupt source determination process is not required. (Note that TFFR0 must be
accessed to clear the flags.)
In this case, if a USBIB or USBIC interrupt occurs, interrupt source determination process is not required. (Note that TSFR0 must be
accessed to clear the flags.)
USB Host
Send ACK to the slave CPU
Send NAK to the host CPU
Send ACK to the host CPU
Receive an OUT data
Receive an OUT data
USB Function Core
Receive an OUT
Receive an OUT
packet (8 bytes)
packet (8 bytes)
the slave CPU
Send NAK to
token packet
token packet
Section 18 Universal Serial Bus Interface (USB)
Disable data write because
Write data to EP2 FIFO
Request an USBID
interrupt (EP2TF)*
Request an USBID
the EP2 FIFO is full
interrupt (EP2TS)*
Restore FVSR2
Rev. 3.00 Jan 25, 2006 page 611 of 872
Core Interface
Modify FVSR2
Modify FVSR2
1
2
the same as that when the initial
Initiate the USBID interrupt
Read USBIFR0 and check
an EP2TF interrupt occurs
Read TFFR0 and check if
The following procedure is
if a TF interrupt occurs
Read FVSR2 and read
Clear the EP2TF bit of
REJ09B0286-0300
Complete the USBID
interrupt processing
interrupt processing
Initiate the USBID
EP2 FIFO data
FIFO is empty.
from EPDR2
TFFR0 to 0
Slave CPU
processing
or not
or not