h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 194

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 6 Bus Controller
Table 6.11 shows the pin states in an idle cycle.
Table 6.11 Pin States in Idle Cycle
6.9
The BSC has a bus arbiter that arbitrates bus master operations. There are three bus masters—the
CPU, DTC, and RFU—that perform read/write operations when they have possession of the bus.
6.9.1
Each bus master requests the bus by means of a bus request signal. The bus arbiter detects the bus
masters' bus request signals, and if a bus request occurs, it sends a bus request acknowledge signal
to the bus master making the request at the designated timing. If there are bus requests from more
than one bus master, the bus request acknowledge signal is sent to the one with the highest
priority. When a bus master receives the bus request acknowledge signal, it takes possession of the
bus until that signal is canceled. The order of priority of the bus masters is as follows:
Rev. 3.00 Jan 25, 2006 page 142 of 872
REJ09B0286-0300
Pins
A17 to A0
D15 to D0
AS, IOS, CS256, CPCS1, CPCS2
RD, CPOE
HWR, LWR, CPWE
(High) RFU > DTC > CPU (Low)
Bus Arbitration
Bus Master Priority
Pin State
Contents of immediately following bus cycle
High impedance
High
High
High