h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 542

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 17 I
Table 17.4 Flags and Transfer States
Rev. 3.00 Jan 25, 2006 page 490 of 872
REJ09B0286-0300
Operating
Mode
Master
mode
Slave
mode
MST
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
0
0
0
0
TRS
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1 /0 *
0
1 /0 *
2
C Bus Interface (IIC)
1
1
BBSY ESTP STOP IRTR
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
AASX AL
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
AAS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
ADZ
ACKB ICDRE ICDRF State
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
0
0
1
1
1
1
1
0
1
0
1
1
1
1
Idle state (flag clearing required)
Start condition detected
Wait state
Transmission end (when ACKB
= 1 received)
Transmission end (when
previous state is ICDRE = 0)
Write to ICDR in above state
Transmission end (when
previous state is ICDRE = 1)
Write to ICDR in above state or
after start condition is detected
Data transfer from transmit
buffer to shift register
(automatic) in above state
Reception end (when previous
state is ICDRF = 0)
Write to ICDR in above state
Reception end (when previous
state is ICDRF = 1)
Write to ICDR in above state
Data transfer from shift register
to receive buffer (automatic) in
above state
Arbitration lost
Stop condition detected
Idle state (flag clearing required)
Start condition detected
SAR match by first frame
(SARX
General call address match by
first frame (SARX
SARX match by first frame
(SAR
SARX)
SAR)
H'00)