s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 570

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

MMU
FAULT ADDRESS AND FAULT STATUS REGISTERS
On a data abort, the MMU places an encoded 4 bit value, FS[3:0], along with the 4-bit encoded domain number, in
the Data fault status register (FSR). Similarly, on a prefetch abort, in the Prefetch fault status register, intended for
debug purposes only. In addition, the modified virtual address associated with the data abort is latched into the fault
address register (FAR). If an access violation simultaneously generates more than one source of abort, they are
encoded in the priority given in Table 3-4 . The fault address register is not updated by faults caused by instruction
prefetches.
FAULT STATUS
The remainder of this chapter describes the various access permissions and controls supported by the data MMU
and details how these are interpreted to generate faults.
NOTES:
1.
2.
3-18
Highest
priority
Lowest priority External abort on NCNB
Data FSR only.
Alignment faults may write either 0b0001 or 0b0011 into FS[3:0].
Invalid values in domain[3:0] occur because the fault is raised before a valid domain field has been read from a page
table descriptor.
Any abort masked by the priority encoding may be regenerated by fixing the primary abort and restarting the instruction.
NCNB means Non-Cacheable and Non-Bufferable.
NCB means Non-Cacheable but Bufferable.
Instruction FSR only.
The same priority applies as for the Data fault status register, except that alignment faults cannot occur, and external
aborts apply only to NC (Non-cacheable) reads.
Alignment
Translation
Domain
Permission
access or NCB read.
Source
Table 3-4. Priority Encoding of Fault Status
Section Page
Section Page
Section Page
Section Page
0b00x1
0b0101
0b0111
0b1001
0b1011
0b1101
0b1111
0b1000
0b1010
Status
invalid
invalid
valid
valid
valid
valid
valid
valid
valid
Domain
ARM920T PROCESSOR
MVA of access
causing abort
MVA of access
causing abort
MVA of access
causing abort
MVA of access
causing abort
MVA of access
causing abort
FAR