s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 142

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

ARM INSTRUCTION SET
Division and Remainder
A number of divide routines for specific applications are provided in source form as part of the ANSI C library provided
with the ARM Cross Development Toolkit, available from your supplier. A short general purpose divide routine follows.
Div1
Div2
Overflow Detection in the ARM920T
1. Overflow in unsigned multiply with a 32-bit result
2. Overflow in signed multiply with a 32-bit result
3. Overflow in unsigned multiply accumulate with a 32-bit result
4. Overflow in signed multiply accumulate with a 32-bit result
3-60
MOV
CMP
CMPCC
MOVCC
MOVCC
BCC
MOV
CMP
SUBCS
ADDCS
MOVS
MOVNE
BNE
UMULL
TEQ
BNE
SMULL
TEQ
BNE
UMLAL
TEQ
BNE
SMLAL
TEQ
BNE
Rcnt,#1
Rb,#0x80000000
Rb,Ra
Rb,Rb,ASL#1
Rcnt,Rcnt,ASL#1
Div1
Rc,#0
Ra,Rb
Ra,Ra,Rb
Rc,Rc,Rcnt
Rcnt,Rcnt,LSR#1
Rb,Rb,LSR#1
Div2
Rd,Rt,Rm,Rn
Rt,#0
overflow
Rd,Rt,Rm,Rn
Rt,Rd ASR#31
overflow
Rd,Rt,Rm,Rn
Rt,#0
overflow
Rd,Rt,Rm,Rn
Rt,Rd, ASR#31
overflow
; Enter with numbers in Ra and Rb.
; Bit to control the division.
; Move Rb until greater than Ra.
; Test for possible subtraction.
; Subtract if ok,
; Put relevant bit into result
; Shift control bit
; Halve unless finished.
; Divide result in Rc, remainder in Ra.
; 3 to 6 cycles
; +1 cycle and a register
; 3 to 6 cycles
; +1 cycle and a register
; 4 to 7 cycles
; +1 cycle and a register
; 4 to 7 cycles
; +1 cycle and a register
S3C2410A