s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 563

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s3c2410a

Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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ARM920T PROCESSOR
LEVEL TWO DESCRIPTOR
If the level one fetch returns either a coarse page table descriptor or a fine page table descriptor, this provides the
base address of the page table to be used. The page table is then accessed and a level two descriptor is returned.
This defines either a tiny, a small or a large page descriptor:
Coarse page tables have 256 entries, each entry describing 4KB. These entries can provide base addresses for
either small or large pages. Large page descriptors must be repeated in 16 consecutive entries.
Fine page tables have 1024 entries, each entry describing 1KB. These entries can provide base addresses for either
tiny, small or large pages. Small page descriptors must be repeated in 4 consecutive entries and large page
descriptors must be repeated in 64 consecutive entries.
The figure below shows the format of level one descriptors.
Bits[1:0] indicate the page size and validity and are interpreted as follows.
31
a tiny page descriptor provides the base address of a 1KB block of memory
a small page descriptor provides to the base address of a 4KB block of memory
a large page descriptor provides the base address of a 64KB block of memory
Value
00
01
10
11
Large page base address
Small page base address
Invalid
Large page
Small page
Tiny page
Tiny page base address
Meaning
Figure 3-6. Page Table Entry (Level One Descriptor)
Table 3-3. Interpreting Page Table Entry Bits 1:0
Generates a page translation fault.
Indicates that this is a 64KB page.
Indicates that this is a 4KB page.
Indicates that this is a 1KB page.
16
15
12
11
ap3
ap3
10 9
ap2
ap2
8
Notes
7
ap1
ap1
6
5
ap0
ap0
ap
4 3
C B
C B
C B
2
1
0
0
1
1
0
0
1
0
1
Fault
Large page
Small page
Tiny page
MMU
3-11

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