s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 395

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s3c2410a

Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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S3C2410A
LCD Control 4 Register
LCDCON4
MVAL
HSPW(TFT)
WLH(STN)
LCDCON4
Register
0X4D00000C
[15:8]
[7:0]
Address
Bit
STN: These bit define the rate at which the VM signal will toggle if the
MMODE bit is set to logic '1'.
TFT: Horizontal sync pulse width determines the HSYNC pulse's high
level width by counting the number of the VCLK.
STN: WLH[1:0] bits determine the VLINE pulse's high level width by
counting the number of the HCLK.
WLH[7:2] are reserved.
00 = 16 HCLK,
10 = 48 HCLK,
R/W
R/W
LCD control 4 register
11 = 64 HCLK
01 = 32 HCLK,
Description
Description
LCD CONTROLLER
Reset Value
0x00000000
Initial state
0X00
0X00
15-29

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