s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 465

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

S3C2410A
MULTI-MASTER IIC-BUS ADDRESS (IICADD) REGISTER
MULTI-MASTER IIC-BUS TRANSMIT/RECEIVE DATA SHIFT (IICDS) REGISTER
IICADD
Slave address
IICDS
Data shift
Register
Register
IICADD
IICDS
0x5400000C
0x54000008
Address
Address
[7:0]
[7:0]
Bit
Bit
7-bit slave address, latched from the IIC-bus.
When serial output enable = 0 in the IICSTAT, IICADD is write-
enabled. The IICADD value can be read any time, regardless of
the current serial output enable bit (IICSTAT) setting.
Slave address = [7:1]
Not mapped
8-bit data shift register for IIC-bus Tx/Rx operation.
When serial output enable = 1 in the IICSTAT, IICDS is write-
enabled. The IICDS value can be read any time, regardless of the
current serial output enable bit (IICSTAT) setting.
R/W
R/W
R/W
R/W
= [0]
IIC-Bus address register
IIC-Bus transmit/receive data shift register
Description
Description
Description
Description
IIC-BUS INTERFACE
Reset Value
Reset Value
Initial State
Initial State
XXXXXXXX
XXXXXXXX
0xXX
0xXX
20-13