s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 247

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

S3C2410A
DMA SPECIAL REGISTERS
Each DMA channel has nine control registers (36 in total since there are four channels for DMA controller). Six of the
control registers control the DMA transfer, and other three ones monitor the status of DMA controller. The details of
those registers are as follows.
DMA INITIAL SOURCE (DISRC) REGISTER
DMA INITIAL SOURCE CONTROL (DISRCC) REGISTER
DISRCCn
DISRCC0
DISRCC1
DISRCC2
DISRCC3
Register
S_ADDR
Register
DISRCn
DISRC0
DISRC1
DISRC2
DISRC3
LOC
INC
0x4B0000C0
0x4B0000C4
0x4B000000
0x4B000040
0x4B000080
0x4B000004
0x4B000044
0x4B000084
[30:0]
Address
Address
Bit
Bit
[1]
[0]
Base address (start address) of source data to transfer. This bit
value will be loaded into CURR_SRC only if the CURR_SRC is 0
and the DMA ACK is 1.
Bit 1 is used to select the location of source.
0: the source is in the system bus (AHB).
1: the source is in the peripheral bus (APB).
Bit 0 is used to select the address increment.
0 = Increment
If it is 0, the address is increased by its data size after each
transfer in burst and single transfer mode.
If it is 1, the address is not changed after the transfer.
(In the burst mode, address is increased during the burst transfer,
but the address is recovered to its first value after the transfer.)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DMA 0 initial source register
DMA 1 initial source register
DMA 2 initial source register
DMA 3 initial source register
DMA 0 initial source control register
DMA 1 initial source control register
DMA 2 initial source control register
DMA 3 initial source control register
1= Fixed
Description
Description
Description
Description
Reset Value
Reset Value
Initial State
Initial State
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0
0
DMA
8-7