s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 174

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

THUMB INSTRUCTION SET
FORMAT 12: LOAD ADDRESS
OPERATION
These instructions calculate an address by adding an 10-bit constant to either the PC or the SP, and load the
resulting address into a register. The THUMB assembler syntax is shown in the following table.
NOTE:
Where the PC is used as the source register (SP = 0), bit 1 of the PC is always read as 0. The value of the PC will
be 4 bytes greater than the address of the instruction before bit 1 is forced to 0.
The CPSR condition codes are unaffected by these instructions.
4-28
L
0
1
The value specified by #Imm is a full 10-bit value, but this must be word-aligned (ie with bits 1:0 set to 0)
since the assembler places #Imm >> 2 in field Word 8.
ADD Rd, PC, #Imm
ADD Rd, SP, #Imm
15
1
THUMB assembler
14
0
13
1
12
0
SP
11
ADD Rd, R15, #Imm
ADD Rd, R13, #Imm
10
[7:0] 8-bit Unsigned Constant
[10:8] Destination Register
[11] Source
0 = PC
1 = SP
Table 4-13. Load Address
ARM equivalent
Figure 4-13. Format 12
Rd
8
7
Add #Imm to the current value of the program
counter (PC) and load the result into Rd.
Add #Imm to the current value of the stack
pointer (SP) and load the result into Rd.
Word 8
Action
0
S3C2410A