s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 162

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

THUMB INSTRUCTION SET
FORMAT 6: PC-RELATIVE LOAD
OPERATION
This instruction loads a word from an address specified as a 10-bit immediate offset from the PC. The THUMB
assembler syntax is shown below.
NOTE:
4-16
LDR Rd, [PC, #Imm]
THUMB assembler
The value specified by #Imm is a full 10-bit address, but must always be word-aligned (ie with bits 1:0 set to 0),
since the assembler places #Imm >> 2 in field Word 8. The value of the PC will be 4 bytes greater than the address
of this instruction, but bit 1 of the PC is forced to 0 to ensure it is word aligned.
15
0
14
0
13
0
12
0
Table 4-7. Summary of PC-Relative Load Instruction
LDR Rd, [R15, #Imm]
11
0
ARM equivalent
10
[7:0] Immediate Value
[10:8] Destination Register
Figure 4-7. Format 6
Rd
8
7
Add unsigned offset (255 words, 1020 bytes) in
Imm to the current value of the PC. Load the
word from the resulting address into Rd.
Word 8
Action
0
S3C2410A