s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 26

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

Figure
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24-8
24-9
24-10
24-11
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24-13
24-14
24-15
24-16
24-17
24-18
24-19
24-20
24-21
24-22
24-23
24-24
24-25
24-26
24-27
24-28
24-29
24-30
24-31
24-32
24-33
24-34
24-35
24-36
25-1
25-2
S3C2410A MICROPROCESSOR
ROM/SRAM Burst READ Timing(I) (Tacs = 0, Tcos = 0, Tacc = 2, Tcoh = 0,
Tcah = 0, PMC = 0, ST = 0, DW = 16-bit)..............................................................24-8
ROM/SRAM Burst READ Timing(II) (Tacs = 0, Tcos = 0, Tacc = 2, Tcoh = 0,
Tcah = 0, PMC = 0, ST = 1, DW = 16-bit)..............................................................24-9
External Bus Request in ROM/SRAM Cycle (Tacs = 0, Tcos = 0, Tacc = 8,
Tcoh = 0, Tcah = 0, PMC = 0, ST = 0) ..................................................................24-10
ROM/SRAM READ Timing (I) (Tacs = 2,Tcos = 2, Tacc = 4, Tcoh = 2, Tcah = 2,
PMC = 0, ST = 0)................................................................................................24-11
ROM/SRAM READ Timing (II) (Tacs = 2, Tcos = 2, Tacc = 4, Tcoh = 2, Tcah = 2,
PMC = 0, ST = 1)................................................................................................24-12
ROM/SRAM WRITE Timing (I) (Tacs = 2,Tcos = 2,Tacc = 4,Tcoh = 2, Tcah = 2,
PMC = 0, ST = 0.................................................................................................24-13
ROM/SRAM WRITE Timing (II) (Tacs = 2, Tcos = 2, Tacc = 4, Tcoh = 2, Tcah = 2,
PMC = 0, ST = 1)................................................................................................24-14
External nWAIT READ Timing (Tacs = 1, Tcos = 1, Tacc = 4, Tcoh = 0, Tcah = 1,
PMC = 0, ST = 0)................................................................................................24-15
External nWAIT WRITE Timing (Tacs = 0, Tcos = 0, Tacc = 4, Tcoh = 0, Tcah = 0,
PMC = 0, ST = 0)................................................................................................24-15
Masked-ROM Single READ Timing
(Tacs = 2, Tcos = 2, Tacc = 8, PMC = 01/10/11)....................................................24-16
Masked-ROM Consecutive READ Timing (Tacs = 0, Tcos = 0, Tacc = 3, Tpac = 2,
PMC = 01/10/11).................................................................................................24-16
SDRAM Single Burst READ Timing (Trp = 2, Trcd = 2, Tcl = 2, DW = 16-bit)...........24-17
External Bus Request in SDRAM Timing (Trp = 2, Trcd = 2, Tcl = 2)........................24-18
SDRAM MRS Timing ...........................................................................................24-19
SDRAM Single READ Timing(I) (Trp = 2, Trcd = 2, Tcl = 2) .....................................24-20
SDRAM Single READ Timing(II) (Trp = 2, Trcd = 2, Tcl = 3).....................................24-21
SDRAM Auto Refresh Timing (Trp = 2, Trc = 4) ......................................................24-22
SDRAM Page Hit-Miss READ Timing (Trp = 2, Trcd = 2, Tcl = 2).............................24-23
SDRAM Self Refresh Timing (Trp = 2, Trc = 4) .......................................................24-24
SDRAM Single Write Timing (Trp = 2, Trcd = 2) .....................................................24-25
SDRAM Page Hit-Miss Write Timing (Trp = 2, Trcd = 2, Tcl = 2)..............................24-26
External DMA Timing (Handshake, Single transfer).................................................24-27
TFT LCD Controller Timing....................................................................................24-27
IIS Interface Timing ..............................................................................................24-28
IIC Interface Timing ..............................................................................................24-28
SD/MMC Interface Timing.....................................................................................24-29
SPI Interface Timing (CPHA = 1, CPOL = 1) ..........................................................24-29
NAND Flash Address/Command Timing ................................................................24-30
NAND Flash Timing .............................................................................................24-30
272-FBGA-1414 Package Dimension 1 (Top View) .................................................25-1
272-FBGA-1414 Package Dimension 2 (Bottom View) ............................................25-2
List of Figures
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