s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 546

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

PROGRAMMER'S MODEL
REGISTER 8: TLB OPERATIONS
Register 8 is a write-only register used to manage the translation lookaside buffers (TLBs), the instruction TLB and
the data TLB.
Five TLB operations are defined and the function to be performed is selected by the opcode_2 and CRm fields in the
MCR instruction used to write CP15 register 8. Writing other opcode_2 or CRm values is unpredictable. Reading from
CP15 register 8 is unpredictable.
Table 2-17 on page 2-18 shows instructions that can be used to perform TLB operations using register 8.
NOTE:
Figure 2-4 shows the modified virtual address format used for operations on single entry TLB lines using register 8.
2-18
Invalidate TLB(s)
Invalidate I TLB
Invalidate I TLB single entry (using MVA)
Invalidate D TLB
Invalidate D TLB single entry (using MVA)
These functions invalidate all the un-preserved entries in the TLB.
Invalidate TLB single entry functions invalidate any TLB entry corresponding to the modified virtual address given in
31
Rd, regardless of its preserved state. See Register 10: TLB lock down register on page 2-21
Function
Modified virtual address
Table 2-17. TLB Operations Register 8
Figure 2-4. Register 8 MVA Format
SBZ
SBZ
MVA format
SBZ
MVA format
Data
10
9
0
8 7
0
MCR p15,0,Rd,c8,c7,0
MCR p15,0,Rd,c8,c5,0
MCR p15,0,Rd,c8,c5,1
MCR p15,0,Rd,c8,c6,0
MCR p15,0,Rd,c8,c6,1
0
6
0
5
0
SBZ
Instruction
4 3
0
ARM920T PROCESSOR
0
2 1
0
0
0
0