peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 77
peb20560
Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20560.pdf
(433 pages)
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falling edge of HDC.
When the “clear to send” function is not needed, CxD must be tied to
Bus Configuration
The SACCO can perform a bus access procedure and collision detection. As a result,
any number of HDLC-controllers can be assigned to one physical channel, where they
perform statistical multiplexing.
Collisions are detected by automatic comparison of each transmitted bit with the bit
received via the CxD input. For this purpose a logical AND of the bits transmitted by
parallel controllers is formed and connected to the input CxD. This may be implemented
most simply by defining the output line to be open drain. Consequently the logical AND
of the outputs is formed by simply tying them together (“wired or”). The result is returned
to the CxD-input of all parallel circuits.
When a mismatch between a transmitted bit and the bit on CxD is detected, the
SACCO-stops sending further data and IDLE is transmitted. As soon as it detects the
transmit bus to be idle again, the controller automatically attempts to re-transmit its
frame. By definition, the bus is assumed idle when x consecutive ones are detected in
the transmit channel. Normally x is equal to 8.
An automatic priority adjustment is implemented in the multi master mode. Thus, when
a complete frame is successfully transmitted, x is increased to 10, and its value is
restored to 8 when 10 '1's are detected on the bus (CxD). Furthermore, transmission of
new frames may be started by the controller after the 10
This multi master, deterministic priority management ensures an equal right of access of
every HDLC-controller to the transmission medium, thereby avoiding blocking situations.
Compared to the Version 1.2 the Version 1.3 provides new features:
Push-pull operation may be selected in bus configuration (up to Version 1.2 only open
drain):
• When active TXDA / TXDB outputs serial data in push-pull-mode.
• When inactive (interframe or inactive time-slots) TXDA / TXDB outputs ‘1’.
Note: When bus configuration with direct connection of multiple ELIC’s is used open
Semiconductor Group
drain option is still recommended.
The push-pull option with bus configuration can only be used if an external tri-state
buffer is placed between TXDA / TXDB and the bus.
Due to the delay of TSCA / TSCB in this mode (see description of bits SOC(0:1)
in register CCR2 (chapter 5.1.1.6.9) these signals cannot directly be used to
enable this buffer.
2-31
Functional Block Description
th
‘1’.
V
SS
.
PEB 20560
2003-08
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