peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 385

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peb20560

Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet

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Semiconductor Group
Figure 7-15 IOM
Note: When FSC and DCL are driven by PFS and PDC4/8, which are generated by
Table 7-16 IOM
Parameter
When FSC and DCL are inputs of the DOC (and of the ELIC)
(ELIC0:CMD1:CSS = ‘1’ AND CCSEL1[0,2] = “11”)
Clock period
Clock period low
Clock period high
CLK16
DCL (8 MHz)
(CCSEL1:DCLF = 1)
DCL (4 MHz)
(CCSEL1:DCLF = 1)
FSC
Note 1
internal clocks generator, the pulse width of FSC (FSC period high) is 8 DCL
cycles, when DCL is driven by PDC4, or 16 DCL cycles, when DCL is driven by
PDC8.
rectly by PDC4/8 and PFS, and the DOC is in Master Mode (PDC and
PFS are generated by internal clocks generator)
®
-2 Interface Timing
®
t
-2 Interface Clocks Timing when FSC and DCL are Driven Di-
t
CD16DC
CD16DC
t
CD16DC
t
t
t
CDDCFS
CDDCFS
CD16FS
t
CP16
Symbol Limit Values Unit Notes
t
t
t
CP
CPL
CPH
t
CPL16
t
t
CPH16
CD16DC
min.
240
50
60
7-24
max.
t
GDCPH
t
t
t
ns
ns
ns
CDDCFS
CDDCFS
CD16FS
t
GDCP
t
GDCPH
Electrical Characteristics
t
GDCPL
clock frequency
< 4096 kHz
t
GDCP
PEB 20560
1))
t
GDCPL
2003-08
ITT10129

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