peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 175

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

2.13
All DOC interrupt sources send their interrupt request to the µP through the interrupt
control unit. This unit checks if the µP allows an interrupt (IE).
• If the interrupt is not masked, the controller sends an interrupt request to the µP. As a
• Interrupt acknowledge from the µP (IACK). According to the interrupt-acknowledge
• If more than one unit sends an interrupt request at the same time, the interrupt control
The µP can also read the Global Interrupt Status Register (IGIS).
The DOC Version 2.1 provides two new 8-bit interrupt status registers (IGIS0 and IGIS1)
for applications in which the generated interrupt vector can not be used. The pending
interrupt status is displayed by reading the registers.
2.13.1
Each interrupt source has a bit in a mask register (IMASKR).
• If the bit is 1, the interrupt is disregarded.
• If the bit is 0, the interrupt is handled
Interrupt Mask Registers (IMASKR)
There are two 8-bit mask registers in the DOC: IMASKR0 and IMASKR1.
Value in both registers after Reset: FF
Interrupt Mask Register 0 (IMASKR0)
Address 302
Read and Write
Reset Value FF
bit
IMASKR0
Semiconductor Group
result, the µP sends interrupt acknowledge through the IACK input and the interrupt
controller puts the address of the interrupt source on the µP data bus.
protocol defined by the selected µP bus mode this signal has different behavior. In
Siemens/Intel mode the vector is driven by the falling edge of the 2nd (last) pulse of
IACK. In Motorola mode the vector is driven by the falling edge of the 1st (and only)
pulse.
unit sends the highest prior source interrupt request first.
Interrupt Controller
MASK (IMASK0, IMASK1)
H
H
7
M7
M6
M5
H
2-129
M4
M3
Functional Block Description
M2
M1
PEB 20560
0
2003-08
M0