peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 269

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Semiconductor Group
5.1.1.4
5.1.1.4.1
Access: read/write
Reset value: 00
Note: If EMOD:ECMD2 is set to ‘0’ some restrictions apply to the setting of register
PMD1…0 PCM-Mode. Defines the actual number of PCM-ports, the data rate range
PCR
Note: Only single clock rate is allowed in PCM-mode 2!
PSM
bit 7
PMD1
PMOD (see chapter 5.1.1.3).
EPIC
PCM-Mode Register (PMOD)
and the data rate stepping.
Table 5-29
PMD1…0 PCM-Mode Port Count
00
01
10
11
The actual selection of physical pins is described below (AIS1/0).
PCM-Clock Rate.
0…single clock rate, data rate is identical with the clock frequency
1…double clock rate, data rate is half the clock frequency selected
PCM Synchronization Mode.
A rising edge on PFS synchronizes the PCM-frame. PFS is not evaluated
directly but is sampled with PDC.
0…the external PFS is evaluated with the falling edge of PDC.
1…the external PFS is evaluated with the rising edge of PDC.
PMD0
selected for ELIC PDC input.
for ELIC PDC input.
The internal PFS (internal frame start) occurs with the next rising
edge of PDC.
The internal PFS (internal frame start) occurs with this rising edge
of PDC.
H
®
-1
0
1
2
3
PCR
PSM
4
2
1
2
5-26
AIS1
min.
256
512
1024
512
Data Rate [Mbit/s]
AIS0
Description of Registers
max.
2048
4096
8192
4096
AIC1
PEB 20560
Stepping
[kbit/s]
256
512
1024
512
Data Rate
bit 0
AIC0
2003-08