peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 190

no-image

peb20560

Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
peb20560HV3.1
Manufacturer:
INF
Quantity:
5 510
Part Number:
peb20560HV3.1
Manufacturer:
STK
Quantity:
5 510
Part Number:
peb20560V2.1
Manufacturer:
INFINEON
Quantity:
3 900
Part Number:
peb20560V2.1-33D0C
Manufacturer:
SIEMENS
Quantity:
5 510
Part Number:
peb20560V2.1-33D0C
Manufacturer:
MOT
Quantity:
5 510
Semiconductor Group
STP
SBR
DLAB
2.14.1.2
The UART contains a programmable baud rate generator. The output frequency of the
baud rate generator is 16 × the baud rate [divisor = (61.44 MHz ÷ 5) ÷ (baud rate × 16)].
These divisor latches must be loaded during initialization to ensure proper operation of
the baud rate generator. Upon loading of the divisor latche, a 16-bit baud counter is
immediately loaded.
Table 2-35 provides decimal divisors to use with crystal frequency of 61.44 MHz.
Using a divisor of zero is not recommended.
Programmable Baud Rate Generator (Divisors)
This bit is the stick parity bit. When bits 3, 4, and 5 are logic 1 the
parity bit is transmitted and checked as a logic 0. If bits 3 and 5 are 1
and bit 4 is logic 0 then the parity bit is transmitted and checked as a
logic 1. If bit 5 is a logic 0 stick parity is disabled.
This bit is the break control bit. It causes a break condition to be
transmitted by the UART. When it is set to a logic 1, the serial output
(SOUT) is forced to the spacing (logic 0) state. The break is disabled
by clearing bit 6 to a logic 0. The break control bit acts only on SOUT
and has no effect on the transmitter logic.
Note: This feature enables the µP to alert a terminal in a computer
1. Load on all O’s pad character in response to THRE.
2. Set break after the next THRE.
3. Wait for the transmitter to be idle, (TEMT = 1) and clear break
This bit is the divisor latch access bit. It must be set high (logic 1) to
access the divisor latches of the baud generator during a read or
write operation. It must be set low (logic 0) to access the receiver
buffer, the transmitter holding register, or the interrupt enable
register.
when normal transmission is to be restored. During the break, the
transmitter can be used as a character timer to accurately
establish the break duration.
communications system. If the following sequence is used, no
erroneous or extraneous characters will be transmitted
because of the break
2-144
Functional Block Description
PEB 20560
2003-08

Related parts for peb20560