peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 73
peb20560
Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20560.pdf
(433 pages)
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2.1.2.4.5
Cyclical Transmission (fully transparent)
When the extended transparent mode is selected, the SACCO supports the continuous
transmission of the XFIFO-contents.
After having written 1 to 32 bytes to the XFIFO, the command XREP/XTF/XME
(XREP/XTF in DMA-mode) is executed. Consequently the SACCO repeatedly transmits
the XFIFO-data via pin TxD.
The cyclical transmission continues until the command (CMDR:XRES) is executed or the
bit XREP is reset. The inter frame timefill pattern is issued afterwards.
When resetting XREP, data transmission is stopped after the next XFIFO-cycle is
completed, the XRES-command terminates data transmission immediately.
Note: Bit MODE:CFT must be set to ‘0’.
Continuous Transmission (DMA-mode only)
If data transfer from system memory to the SACCO is done by DMA (DMA bit in XBCH
set), the number of bytes to be transmitted is usually defined via the transmit byte count
registers XBCH, XBCL. Setting the “transmit continuously” bit (XC) in XBCH, however,
the byte count value is ignored and the DMA-interface of the SACCO will continuously
request for transmit data any time 32 bytes can be stored in the XFIFO.
This feature can be used e.g. to
• continuously transmit voice or data onto a PCM-highway
• transmit frames exceeding the byte count programmable in XBCH,
Note: If the XC-bit is reset during continuous transmission, the transmit byte count
Receive Length Check
The SACCO offers the possibility to supervise the maximum length of received frames
and to terminate data reception in case this length is exceeded.
This feature is enabled by setting the RC- (receive check) bit in RLCR and programming
the maximum frame length via bits RL6…RL0.
Semiconductor Group
(clock mode 2, ext. transp. mode)
XBCL (> 4095 bytes).
becomes valid again, and the SACCO will request the amount of DMA-transfers
programmed in XBC11…XBC0. Otherwise the continuous transmission is
stopped when a data underrun condition occurs in the XFIFO, i.e. the
DMA-controller does not transfer further data to the SACCO. In this case an abort
sequence (min. 7 ‘1’s) followed by the inter frame timefill pattern is transmitted (no
CRC-word is appended).
Special Functions
2-27
Functional Block Description
PEB 20560
2003-08
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