peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 114

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peb20560

Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet

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PEB 20560
Functional Block Description
2.7.3.1
Memory Configuration Register (MEMCONFR)
The memory configuration register, MEMCONFR, is a memory mapped register, at
address C002
, which controls the memory interface. In the following are its bit
H
assignments:
bit
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
MEMCONFR
0
0
0
0
0
0
0
0
0
0
0
0
0
DWS
Note: Bits 15…3 are unused and are read as ‘0’.
DWS - sets the number of wait states on external data space (0-7).
DWS can be read or write by the DSP.
After reset it is set to 0007
.
H
WAIT-STATES
External Data Space
The wait-state generator is capable of generating programmable number (0-7) of w.s.
when accessing the external data. The w.s. number can be programmed by setting the
DWS field, in the MEMCONFR register, to the number of the desired w.s. When
DWS = 0 no wait states will be implemented. After reset the DWS is set to 7.
External Boot ROM (can be on CDI)
The access to the EPROM, during stand-alone boot, is with the same number of
wait-states as written in DWS.
Semiconductor Group
2-68
2003-08

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