peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 56

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Semiconductor Group
2.1.2.4.3
Two independent 64-byte deep FIFOs for transmit and receive direction are provided.
They enable an intermediate storage of data between the serial and the parallel (CPU)
interface. The FIFOs are divided into two halves of 32 bytes each, where only one half
is accessible by the CPU- or DMA-controller.
Receive FIFO
The receive FIFO (RFIFO) is organized in two parts of 32 bytes each, of which only one
part is accessible for the CPU.
When a frame with up to 64 bytes is received, the complete frame may be stored in
RFIFO. After the first 32 bytes have been received, the SACCO prompts to read the data
block by means of interrupt or DMA-request (RPF-interrupt or activation of DRQR-line).
The data block remains in the RFIFO until a confirmation is given to the
SACCO-acknowledging the reception of the data. This confirmation is either a RMC-
(Receive Message Complete) command in interrupt mode or it is implicitly achieved in
DMA-mode after 32 bytes have been read. As a result it is possible in interrupt mode to
read out the data block any number of times until the RMC-command is executed. Upon
the confirmation the second data block is shifted into the accessible RFIFO-part and an
RME-interrupt is generated. The configuration of the RFIFO prior to and after
acknowledgment is shown in Figure 2-8 (left). If frames longer than 64 bytes are
received, the SACCO will repeatedly prompt to read out 32-byte data blocks via interrupt
or DMA.
Figure 2-8
CPU Inaccessible
FIFO Part,
32 Bytes
CPU Accessible
FIFO Part,
32 Bytes
FIFO-Structure
Frame Storage in RFIFO (single frame / multiple frames)
RFIFO Status Prior
to Acknowledgement
Block B+1
32 Bytes
Frame j
Block B
Frame j
Free
RFIFO Status After
Acknowledgement
Block B+1
Free
Free
2-10
RFIFO Status Prior
to Acknowledgement
Last Block of
Functional Block Description
Frame i+n
Frame i+1
Frame i
Free
Free
0 < n < 17
RFIFO Status After
Acknowledgement
Frame i+1
Frame i+2
Frame i+n
PEB 20560
Free
Free
ITD05830
2003-08