peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 135

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Figure 2-39 Example: Flow of B-Channels between ELIC1 and PEDIU
Two data streams with 32 successive time-slots each, or one data stream of
64 time-slots, come every 125 µs from EPIC0 and EPIC1 in data downstream direction.
They are converted into 8-bit parallel values, or into 16-bit a-/µ-law linear values, and
stored via a DMA controller in a RAM (the circular buffer). The RAM contains 128 words
for received data (DSP-IN) configured in 4 IN blocks, and 128 words for data to be
transmitted back to the upstream (DATA-OUT), configured in 4 OUT blocks. While the
DMA controller writes the data of the current downstream frame (frame n) into one half
of DSP-IN block, the DSP accesses the second half of DSP-IN, which contains
B-channels values of the previous frame (frame n-1). At the same time the DMA reads
data from one half of the DSP-OUT block into the upstream, while the DSP writes into
the other half of DSP-OUT; the data to be read into the upstream in the next frame (frame
n +1). All accesses to the circular buffer are synchronized by FSC (Frame
Synchronization Clock) and by DCL (Data Clock). For more information on the process,
which takes place every frame, see Figure 2-40.
Semiconductor Group
B1
IOM -2
B3
B1 B2
R
DD11
DU11
IN1 OUT1
DD10
DU10
PEDIU
CFI
Port 0
Port 1
B3 B4
ELIC
2-89
R
-1
DSP
Port 0
PCM
Functional Block Description
RxD0
TxD0
B1*
B1*
PCM
B3*
B3*
ITS10092
B2
B4
PEB 20560
2003-08