peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 13

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

List of Figures
Figure 1-1
Figure 1-2
Figure 1-3
Figure 1-4
Figure 1-5
Figure 1-6
Figure 1-7
Figure 2-1
Figure 2-2
Figure 2-3
Figure 2-4
Figure 2-5
Figure 2-6
Figure 2-7
Figure 2-8
Figure 2-9
Figure 2-10 XFIFO Loading, Continuous Frame Transmission Enabled (CFT = 1) 2-12
Figure 2-11 Support of the HDLC Protocol by the SACCO . . . . . . . . . . . . . . . . . . . 2-13
Figure 2-12 Polling of up to 64 Bytes Direct Data . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
Figure 2-13 Polling More than 64 Bytes of Direct Data (e.g. 96 bytes) . . . . . . . . . . 2-19
Figure 2-14 Re-Transmission of a Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
Figure 2-15 Re-Transmission of a Frame with Auto-Repeat Function . . . . . . . . . . 2-21
Figure 2-16 Polling of Prepared Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
Figure 2-17 Receive Data Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-26
Figure 2-18 Location of Time-Slots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-29
Figure 2-19 D-Channel Arbiter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-33
Figure 2-20 Arbiter State Machine (ASM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-36
Figure 2-21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-40
Figure 2-22 SIDEC Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-41
Figure 2-23 SIDEC Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-42
Figure 2-24 Principle Block Diagram of IOM and PCM Multiplexers;
Figure 2-25 Modes of HDLC Connection to IOM
Figure 2-26 IOM
Figure 2-27 PCM-Ports Multiplexer in Mode 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-46
Figure 2-28 SACCO-B0 Multiplexers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-48
Semiconductor Group
Functional Blocks of a PBX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Application Example
PBX for 32 Subscribers with 4 Trunk Lines using one DOC . . . . . . . . . 1-2
Principle Block Diagram of the DOC . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
DOC Logic Symbol. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
DOC Pin Configuration (P-MQFP-160 Package) . . . . . . . . . . . . . . . . . . 1-8
Functional Block Diagram and System Integration . . . . . . . . . . . . . . . 1-25
Example for a PBX with one DOC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-26
EPIC
Timing Diagram for DMA-Transfers (fast) Transmit (n < 32,
remainder of a long message or n = k × 32) . . . . . . . . . . . . . . . . . . . . . 2-7
Timing Diagram for DMA-Transfers (slow) Transmit (n < 32,
remainder of a long message or n = k × 32) . . . . . . . . . . . . . . . . . . . . . 2-8
Timing Diagram for DMA-Transfer (fast) Receive (n = k × 32) . . . . . . . 2-8
Timing Diagram for DMA-Transfers (slow) Receive (n = k × 32) . . . . . . 2-8
Timing Diagram for DMA-Transfers (slow or fast) Receive
(n = 4, 8 or 16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
DMA-Transfers with Pulsed DACK (read or write) . . . . . . . . . . . . . . . . . 2-9
Frame Storage in RFIFO (single frame / multiple frames) . . . . . . . . . . 2-10
XFIFO Loading, Continuous Frame Transmission Disabled (CFT = 0) 2-11
Mode 0-0-0-0-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-43
Signaling MUX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-44
in Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-45
®
®
Ports Multiplexer in Mode 1 and ELIC
-1 Memory Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
I-11
®
-2 Interfaces within the
®
-1-Ports Multiplexer
PEB 20560
2003-08
Page