peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 303

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Semiconductor Group
Note: MODE:CFT must be set to ‘0’ when using cyclic transmission.
XPD/XTF
XME
XRES
5.1.1.5.7
Access: read/write
Reset value: 00
MDS1…0 Mode Select.
ADM
bit 7
MDS1
Mode Register (MODE)
The cyclical transmission continues until the command (CMDR:XRES) is
executed or the bit XREP is reset. The inter frame timefill pattern is issued
afterwards.
When resetting XREP, data transmission is stopped after the next XFIFO-
cycle is completed, the XRES-command terminates data transmission
immediately.
Transmit Prepared Data/Transmit Transparent Frame.
• Non-auto-mode, transparent mode 0,1: XTF
• Extended transparent mode 0,1: XTF
Transmit Message End (interrupt mode only).
A ‘1’ indicate that the data block written last to the XFIFO completes the
actual frame. The SACCO can terminate the transmission operation
properly by appending the CRC and the closing flag sequence to the data.
XME is used only in combination with XPD/XTF or XDD.
Transmit Reset.
The contents of the XFIFO is deleted and IDLE is transmitted. This
command can be used by the CPU to abort a frame currently in
transmission. After setting XRES a XPR-interrupt is generated in every
case.
The operating mode of the HDLC-controller is selected.
01…non-auto-mode
10…transparent mode (D-channel arbiter)
11…extended transparent mode
Address Mode. The meaning of this bit varies depending on the selected
operating mode:
MDS0
The transmission of the XFIFO contents is started, an opening flag
sequence is automatically added.
The transmission of the XFIFO contents is started, no opening flag
sequence is added.
H
ADM
CFT
5-60
RAC
0
Description of Registers
0
PEB 20560
bit 0
TLP
2003-08