peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 226

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peb20560

Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet

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Semiconductor Group
The initialization of the complete tri-state field takes 1035 RCL-cycles.
Note: 1) It is also possible to program the value ‘1111’ to the tri-state field in order to
3.1.6.3
To initialize the SACCO, the CPU has to write a minimum set of registers. Depending on
the operating mode and on the features required, an optional set of register must also
be initialized.
As the first register to be initialized, the MODE-register defines operating and address
mode. If data reception shall be performed, the receiver must be activated by setting the
RAC-bit. Depending on the mode selected, the following registers must also be defined:
Table 3-3 Mode Dependent Register Set-up
Transparent mode 1
Non-auto mode
Auto-mode
The second minimum register to be initialized is the CCR2. In combination with the
CCR1, the CCR2 defines the configuration of the serial port. It also allows enabling the
RFS-interrupt.
If bus configuration is selected, the external serial bus must be connected to the C× D-pin
for collision detection. In point-to-point configuration, the C× D-pin must be tied to ground
if no “clear to send” function is provided via a modem.
have all time-slots switched to low impedance upon the activation of the
PCM-interface.
2) While OMDR:PSB = 0, all PCM-output drivers are set to high impedance,
regardless of the values written to the tri-state field.
OMDR =
MADR =
MACR =
Wait for STAR:MAC = 0
SACCO-Initialization
C0
00
68
H
H
H
; OMS1…0 = 11, normal mode
; code field value ‘0000’
; MOC-code to initialize all tri-state locations (1101
1 Byte Address
RAH1 = 00
RAH2 = 00
RAL1
RAL2
XAD1
XAD2
RAH1 = 00
RAH2
RAL1
RAL2
3-20
H
H
H
B
Operational Description
2 Byte Address
RAH1
RAH2
RAH1
RAH2
RAL1
RAL2
XAD1
XAD2
RAH1
RAH2
RAL1
RAL2
PEB 20560
B
)
2003-08

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