peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 42

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Semiconductor Group
Table 1-7 Input / Output Port (cont’d)
Pin
No.
84
85
86
1)
Whenever the DSR bit etc. DCD bit of the modem status register changes state, an interrupt is generated if
the modem status interrupt is enabled
Symbol
DTR
RI
DCD
In (I)
Out (O)
O
I
I
During
Reset
Function
Data Terminal Ready
When low, this informs the modem or data set
that the UART is ready to establish a
communications link. The DTR output signal can
be set to an active low by programming bit 0
(DTR) of the modem control register to a high
level. A master reset operation sets this signal to
its inactive (high) state. Loop mode operation
holds this signal in its inactive state.
Ring Indicator
When low, this signal indicates that a telephone
ringing signal has been received by the modem
or data set. The Rl signal is a modem status
input whose condition can be tested by the CPU
reading bit 6 (Rl) of the modem status register.
Bit 6 is the complement of the Rl signal. Bit 2
(TERI) of the modem status register indicates
whether the Rl input signal has changed from a
low to a high state since the previous reading of
the modem status register.
Note: Whenever the Rl bit of the modem status
Data Carrier Detect
When low, it indicates that the data carrier has
been detected by the modem or data set. The
DCD signal is a modem status input whose
condition can be tested by the CPU reading bit 7
(DCD) of the modem status register. Bit 7 is the
complement of the DCD signal. Bit 3 (DDCD) of
the modem status register indicates whether the
DCD input has changed state since the previous
reading of the modem status register. DCD has
no effect on the receiver.
1-22
register changes from a high to a low
state, an interrupt is generated if the
modem status interrupt is enabled.
1)
PEB 20560
Overview
2003-08