S1D13505 Epson Electronics America, Inc., S1D13505 Datasheet - Page 506

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S1D13505

Manufacturer Part Number
S1D13505
Description
LCD Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

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Page 18
4.3 S1D13505 Hardware Configuration
4.4 Register/Memory Mapping
S1D13505
X23A-G-008-05
S1D13505
Pin Name
MD[3:1]
MD11
MD0
MD4
MD5
MD9
8-bit host bus interface
110 = PowerPC host bus interface selected
Little Endian
Wait# signal is active high
Reserved
Alternate Host Bus Interface Selected
= required settings for MPC821 support.
The S1D13505 latches MD15 through MD0 to allow selection of the bus mode and other
configuration data on the rising edge of RESET#. For details on configuration, refer to the
S1D13505 Hardware Functional Specification, document number X23A-A-001-xx.
The following table shows those configuration settings important to the MPC821 host bus
interface.
The DRAM on the MPC821 ADS board extends from address 0 through 3F FFFFh, so the
S1D13505 is addressed starting at 40 0000h. A total of 4M bytes of address space is used,
where the lower 2M bytes is reserved for the S1D13505 on-chip registers and the upper 2M
bytes is used to access the S1D13505 display buffer.
value on this pin at rising edge of RESET# is used to configure: (1/0)
Table 4-2: Summary of Power-On/Reset Options
1
16-bit host bus interface
Big Endian
Wait# signal is active low
Configure SUSPEND# pin as Hardware
Suspend Enable
Primary Host Bus Interface Selected
Interfacing to the Motorola MPC821 Microprocessor
0
Epson Research and Development
Vancouver Design Center
Issue Date: 01/02/05

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