S1D13505 Epson Electronics America, Inc., S1D13505 Datasheet - Page 27

• Manufacturer Part Number: S1D13505
• Description: LCD Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
4.2.4 Memory Controller
4.2.5 Display FIFO
4.2.6 Cursor FIFO
4.2.7 Look-Up Tables
4.2.8 CRTC
4.2.9 LCD Interface
4.2.10 DAC
4.2.11 Power Save
4.2.12 Clocks
Hardware Functional Specification
Issue Date: 01/02/02
The Memory Controller block arbitrates between CPU accesses and display refresh accesses as well
as generates the necessary signals to interface to one of the supported 16-bit memory devices (FPM-
DRAM or EDO-DRAM).
The Display FIFO block fetches display data from the Memory Controller for display refresh.
The Cursor FIFO block fetches Cursor/ink data from the Memory Controller for display refresh.
The Look-Up Tables block contains three 256x4 Look-Up Tables (LUT), one for each primary
color. In monochrome mode, only the green LUT is selected and used. This block contains anti-
sparkle circuitry. The cursor/ink and display data are merged in this block.
The CRTC generates the sync timing for the LCD and CRT, defining the vertical and horizontal
display periods.
The LCD Interface block performs Frame Rate Modulation (FRM) for passive LCD panels and
generates the correct data format and timing control signals for various LCD and TFT/D-TFD
panels.
The DAC is the Digital to Analog converter for analog CRT support.
The Power Save block contains the power save mode circuitry.
The Clocks module is the source of all clocks in the chip.
X23A-A-001-14
S1D13505
Page 21