S1D13505 Epson Electronics America, Inc., S1D13505 Datasheet - Page 463

• Manufacturer Part Number: S1D13505
• Description: LCD Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
3 S1D13505 Host Bus Interface
3.1 PC Card Host Bus Interface Pin Mapping
Interfacing to the PC Card Bus
Issue Date: 01/02/05
Note
Note
The S1D13505 implements a 16-bit PC Card (PCMCIA) host bus interface which is used
to interface to the PC Card bus.
The PC Card host bus interface is selected by the S1D13505 on the rising edge of RESET#.
After releasing reset the bus interface signals assume their selected configuration. For
details on S1D13505 configuration, see Section 4.2, “S1D13505 Hardware Configuration”
on page 15.
The following table shows the functions of each host bus interface signal.
At reset, the Host Interface Disable bit in the Miscellaneous Disable Register
(REG[1Bh] bit 7) is set to 1. This means that only REG[1Ah] (read-only) and
REG[1Bh] are accessible until a write to REG[1Bh] sets bit 7 to 0 making all regis-
ters accessible. When debugging a new hardware design, this can sometimes give the
appearance that the interface is not working, so it is important to remember to clear this
bit before proceeding with debugging.
1
2
the S1D13505 PC Card host bus interface. For an example of how this can be accom-
plished see the discussion on BUSCLK in Section 3.2, “PC Card Host Bus Interface
Signals” on page 12.
Although a clock is not directly supplied by the PC Card interface, one is required by
The bus signal A0 is not used by the S1D13505 internally.
Table 3-1: PC Card Host Bus Interface Pin Mapping
S1D13505 Pin Name
BUSCLK
RD/WR#
AB[20:0]
DB[15:0]
RESET#
WAIT#
WE1#
WE0#
M/R#
CS#
RD#
BS#
PC Card (PCMCIA)
External Decode
External Decode
Inverted RESET
A[20:0]
D[15:0]
-WAIT
-CE2
-CE1
-WE
n/a
V
-OE
DD
2
1
X23A-G-005-06
S1D13505
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