S1D13505 Epson Electronics America, Inc., S1D13505 Datasheet - Page 170

• Manufacturer Part Number: S1D13505
• Description: LCD Controller
• Manufacturer: Epson Electronics America, Inc.

Page 16
3 Memory Models
3.1 Display Buffer Location
3.1.1 Memory Organization for One Bit-Per-Pixel (2 Colors/Gray Shades)
S1D13505
X23A-G-003-07
Bit 7
Pixel 0
Figure 3-1: Pixel Storage for 1 Bpp (2 Colors/Gray Shades) in One Byte of Display Buffer
Bit 6
Pixel 1
The S1D13505 is capable of several color depths. The memory model for each color depth
is packed pixel. Packed pixel data changes with each color depth from one byte containing
eight consecutive pixels up to two bytes being required for one pixel.
The S1D13505 supports either a 512k byte or 2M byte display buffer. The display buffer is
memory mapped and can be accessed directly by software. The memory location allocated
to the S1D13505 display buffer varies with each individual hardware platform, and is
determined by the OEM.
For further information on the display buffer, see the S1D13505 Hardware Functional
Specification, document number X23A-A-001-xx.
In this memory format each byte of display buffer contains eight adjacent pixels. Setting or
resetting any pixel will require reading the entire byte, masking out the appropriate bits and,
if necessary, setting the bits to ’1’.
One bit pixels provide two gray shade/color possibilities. For monochrome panels the two
gray shades are generated by indexing into the first two elements of the green component
of the Look-Up Table (LUT). For color panels the two colors are derived by indexing into
positions 0 and 1 of the Look-Up Table.
Bit 5
Pixel 2
Bit 4
Pixel 3
Bit 3
Pixel 4
Bit 2
Pixel 5
Epson Research and Development
Programming Notes and Examples
Bit 1
Pixel 6
Vancouver Design Center
Issue Date: 01/02/05
Bit 0
Pixel 7