S1D13505 Epson Electronics America, Inc., S1D13505 Datasheet - Page 195

• Manufacturer Part Number: S1D13505
• Description: LCD Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
6.2.1 Registers
Programming Notes and Examples
Issue Date: 01/02/05
REG[1Ah] Power Save Configuration Register
Power Save
Status (RO)
REG[1Ah] Power Save Configuration Register
Power Save
Status (RO)
REG[1Ah] Power Save Configuration Register
Power Save
Status (RO)
n/a
n/a
n/a
Suspend Refresh Select Bits [1:0]
Note
The Software Suspend Mode Enable bit initiates Software suspend when set to 1. Setting
the bit back to 0 returns the controller back to normal mode.
The Suspend Refresh Select Bits specify the type of DRAM refresh used during suspend
mode. The type of DRAM refresh is as follows:
The Power Save Status bit is a read-only status bit which indicates the power-save state of
the S1D13505. When this bit returns a 1, the panel is powered-off and the memory is in a
suspend memory refresh mode. When this bit returns a 0, the S1D13505 is either powered-
on, in transition of powering-on, or in transition of powering-off.
The Suspend Refresh Select bits should never be changed while in suspend mode.
n/a
n/a
n/a
1X
00
01
Table 6-1: Suspend Refresh Selection
n/a
n/a
n/a
LCD Power
Disable
LCD Power
Disable
LCD Power
Disable
CAS-before-RAS (CBR) refresh
DRAM Refresh Type
Suspend
Refresh
Select Bit 1
Suspend
Refresh
Select Bit 1
Suspend
Refresh
Select Bit 1
Self-Refresh
No Refresh
Suspend
Refresh
Select Bit 0
Suspend
Refresh
Select Bit 0
Suspend
Refresh
Select Bit 0
Software
Suspend
Mode Enable
Software
Suspend
Mode Enable
Software
Suspend
Mode Enable
X23A-G-003-07
S1D13505
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