TMP86xy92DMG Toshiba, TMP86xy92DMG Datasheet - Page 76

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TMP86xy92DMG

Manufacturer Part Number
TMP86xy92DMG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy92DMG

Package
SSOP30
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
16
Ram Size
512
Driver Led
8
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
6
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
1
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
24
Power Supply (v)
4 to 5.5
6.1
Power-on reset circuit
Supply operating voltage
CPU/peripheral circuits
reset signal
Power-on reset signal
Note 1: The power-on reset circuit may not operate properly depending on transitions in supply voltage (VDD). When de-
Note 2: The input clock to the warm-up counter is derived from the oscillation circuit. Because the oscillation frequency is
Note 3: The supply voltage must be raised to satisfy the condition t
Warm-up
counter clock
signing your application system, careful consideration must be given to ensure proper operation of the power-on reset
circuit by referring to the device's electrical characteristics.
unstable until the oscillation circuit stabilizes, the warm-up time includes error.
V
V
PROFF
PRON
V
DD
Figure 6-2 Operation of the power on reset circuit
t
VDD
Warm-up counter start
t
PWUP
Page 62
VDD
< t
PWUP
t
PRON
.
t
PRW
t
PROFF
TMP86FH92DMG

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