TMP86xy92DMG Toshiba, TMP86xy92DMG Datasheet - Page 132

• Manufacturer Part Number: TMP86xy92DMG
• Manufacturer: Toshiba

Specifications of TMP86xy92DMG

• Package: SSOP30
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 16
• Ram Size: 512
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 6
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 24
• Power Supply (v): 4 to 5.5

11.3
Function
Example :After checking high-frequency clock oscillation stability with TC4 and 3, switching to the NORMAL1 mode
11.3.9.2
PINTTC4:
VINTTC4:
Table 11-9 Setting Time in High-Frequency Warm-Up Counter Mode
is obtained. Before starting the timer, set SYSCR2<XEN> to 1 to oscillate the high-frequency clock. When
a match between the up-counter and the timer register (TTREG4, 3) value is detected after the timer is started
by setting TC4CR<TC4S> to 1, the counter is cleared by generating the INTTC4 interrupt request. After
stopping the timer in the INTTC4 interrupt service routine, clear SYSCR2<SYSCK> to 0 to switch the system
clock from the low-frequency to high-frequency, and then SYSCR2<XTEN> to 0 to stop the low-frequency
clock.
(SLOW1 → SLOW2 → NORMAL2 → NORMAL1)
In this mode, the warm-up period time from a stop of the high-frequency clock fc to the oscillation stability
High-Frequency Warm-Up Counter Mode
SET
LD
LD
LDW
DI
SET
EI
SET
:
CLR
CLR
CLR
RETI
:
DW
(TTREG4, 3 = 0100H)
Minimum time Setting
16 μs
(SYSCR2).7
(TC3CR), 63H
(TC4CR), 05H
(TTREG3), 0F800H
(EIRH). 7
(TC4CR).3
:
(TC4CR).3
(SYSCR2).5
(SYSCR2).6
:
PINTTC4
Page 118
; SYSCR2<XEN> ← 1
; Sets TFF3=0, source clock fc, and 16-bit mode.
; Sets TFF4=0, and warm-up counter mode.
; Sets the warm-up time.
; (The warm-up time depends on the oscillator characteristic.)
; IMF ← 0
; Enables the INTTC4.
; IMF ← 1
; Starts the TC4 and 3.
; Stops the TC4 and 3.
; SYSCR2<SYSCK> ← 0
; (Switches the system clock to the high-frequency clock.)
; SYSCR2<XTEN> ← 0
; (Stops the low-frequency clock.)
; INTTC4 vector table
Maximum time Setting
(TTREG4, 3 = FF00H)
4.08 ms
TMP86FH92DMG