TMP86xy92DMG Toshiba, TMP86xy92DMG Datasheet - Page 106

• Manufacturer Part Number: TMP86xy92DMG
• Manufacturer: Toshiba

Specifications of TMP86xy92DMG

• Package: SSOP30
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 16
• Ram Size: 512
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 6
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 24
• Power Supply (v): 4 to 5.5

10.3
Function
10.3.5
pin, and counts up at the edge of the internal clock. Either the rising or falling edge of the internal clock is selected
as the trigger edge in TC1CR<TC1S>. Either the single- or double-edge capture is selected as the trigger edge
in TC1CR<MCAP1>.
Note 1: The captured value must be read from TC1DRB until the next trigger edge is detected. If not read, the
Note 2: For the single-edge capture, the counter after capturing the value stops at “1” until detecting the next edge.
Note 3: The first captured value after the timer starts may be read incorrectively, therefore, ignore the first period
In the pulse width measurement mode, the up-counter starts counting by the input pulse triggering of the TC1
Pulse Width Measurement Mode
・ When TC1CR<MCAP1> is set to “1” (single-edge capture)
・ When TC1CR<MCAP1> is set to “0” (double-edge capture)
width, set the rising edge to TC1CR<TC1S>. To measure the low-level input pulse width, set the falling
edge to TC1CR<TC1S>.
up-counter captures the up-counter value into TC1DRB and generates an INTTC1 interrupt request.
The up-counter is cleared at this time, and then restarts counting when detecting the trigger edge used
to start counting.
cycle starting with the high-going pulse, set the rising edge to TC1CR<TC1S>. To measure the cycle
starting with the low-going pulse, set the falling edge to TC1CR<TC1S>.
up-counter captures the up-counter value into TC1DRB and generates an INTTC1 interrupt request.
The up-counter continues counting up, and captures the up-counter value into TC1DRB and generates
an INTTC1 interrupt request when detecting the trigger edge used to start counting. The up-counter is
cleared at this time, and then continues counting.
captured value becomes a don’t care. It is recommended to use a 16-bit access instruction to read the
captured value from TC1DRB.
Therefore, the second captured value is “1” larger than the captured value immediately after counting starts.
captured values.
Either high- or low-level input pulse width can be measured. To measure the high-level input pulse
When detecting the edge opposite to the trigger edge used to start counting after the timer starts, the
The cycle starting with either the high- or low-going input pulse can be measured. To measure the
When detecting the edge opposite to the trigger edge used to start counting after the timer starts, the
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TMP86FH92DMG