TMP86xy92DMG Toshiba, TMP86xy92DMG Datasheet - Page 72

no-image

TMP86xy92DMG

Manufacturer Part Number
TMP86xy92DMG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy92DMG

Package
SSOP30
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
16
Ram Size
512
Driver Led
8
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
6
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
1
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
24
Power Supply (v)
4 to 5.5
5.4
P3 (P37 to P30) Port
5.4
input and key-on wakeup input (KWI).
reset, the P3CR1 and P3CR2 are initialized to 0 and 1, respectively, so the P3 port is configured for input mode. The
P3 port output latches are initialized to 0.
the P3CR2 to 1.
bit in the STOPCR to 1.
in the P3CR2 to 0.
however, avoid executing output instructions on these pins to ensure the accuracy of conversion. Also note that, during
AD conversion, rapidly changing signals should not be input on any pins near analog input pins.
P3 (P37 to P30) Port
The P3 port is an 8-bit input/output port that can be specified for input or output bitwise, and is shared with analog
The P3 port input/output control registers P3CR1 and P3CR2 are used to specify the function of each pin. After
To use each pin as a port output, set the corresponding bit in the P3CR1 to 1.
To use each pin as a port input, set the corresponding bit in the P3CR1 to 0 and then set the corresponding bit in
To use each pin as a key-on wakeup input, set the corresponding bit in the P3CR1 to 0 and then set the corresponding
To use each pin as an analog input, set the corresponding bit in the P3CR1 to 0 and then set the corresponding bit
When P3CR1=1, reading the P3DR returns the values of the respective output latches.
Any pins of the P3 port which are not used for analog input can be used as input/output ports. During AD conversion,
Table 5-1 Setting of register according to each function value
Port input
Key-on wakeup input
Analog input
Port 0 output
Port 1 output
Function
Table 5-2 Setting of register according to each function value
P3CR1
0
0
1
Condition
P3CR2
P3DR
0
1
0
1
0
1
-
-
-
Page 58
Contents of output latch
Reading value of P3DR
P3CR1
State of terminal
0
0
0
1
1
Set value
0
P3CR2
1
0
-
-
-
STOPCR
1
-
-
-
-
TMP86FH92DMG

Related parts for TMP86xy92DMG