TMP86xy92DMG Toshiba, TMP86xy92DMG Datasheet - Page 156

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TMP86xy92DMG

Manufacturer Part Number
TMP86xy92DMG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy92DMG

Package
SSOP30
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
16
Ram Size
512
Driver Led
8
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
6
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
1
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
24
Power Supply (v)
4 to 5.5
14.3
SEI Operation
14.3
14.3.1
14.3.2
ously. The serial clock synchronizes the timing at which information on the two serial data lines are shifted or sampled.
Slave device can be selected individually using the slave select pin (SS pin). For unselected slave devices, data on the
SEI bus cannot be taken in.
During a SEI transfer, data transmission (serial shift-out) and reception (serial shift-in) are performed simultane-
When operating as the master devices, the SS pin can be used to indicate multiple-master bus connection.
SEI Operation
using two bits, CPHA and CPOL (SECR<CPHL,CPOL>).
fected).
same clock phase and polarity.
that of the slave device to which to transfer.
devices. Refer to Section “"14.5 SEI Transfer Formats "”.
The SEI clock allows its phase and polarity to be selected in software from four combinations available by
The clock polarity is set by CPOL to select between active-high or active-low (The transfer format is unaf-
The clock phase is set by CPHA. The master device and the slave devices to communicate with must have the
If multiple slave devices with different transfer formats exist on the same bus, the format can be changed to
The programmable data and clock timing of SEI allows connection to almost all synchronous serial peripheral
Controlling SEI clock polarity and phase
SEI data and clock timing
Table 14-2 Clock Phase and Polarity
CPHA
CPOL
SEI control register (SECR 002AH) bit 2
SEI control register (SECR 002AH) bit 3
Page 142
TMP86FH92DMG

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