TMP86xy92DMG Toshiba, TMP86xy92DMG Datasheet - Page 100

• Manufacturer Part Number: TMP86xy92DMG
• Manufacturer: Toshiba

Specifications of TMP86xy92DMG

• Package: SSOP30
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 16
• Ram Size: 512
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 6
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 24
• Power Supply (v): 4 to 5.5

10.3
Function
Example 1 :Setting the timer mode with source clock fc/2
Example 2 :Auto-capture
10.3
10.3.1
measurement, programmable pulse generator output modes.
Table 10-1 Internal Source Clock for TimerCounter 1 (Example: fc = 16 MHz, fs = 32.768 kHz)
TC1CK
TimerCounter 1 has six types of operating modes: timer, external trigger timer, event counter, window, pulse width
00
01
10
Function
and the timer register 1A (TC1DRA) value is detected, an INTTC1 interrupt is generated and the up-counter is
cleared. After being cleared, the up-counter restarts counting. Setting TC1CR<ACAP1> to “1” captures the up-
counter value into the timer register 1B (TC1DRB) with the auto-capture function. Use the auto-capture function
in the operative condition of TC1. A captured value may not be fixed if it's read after the execution of the timer
stop or auto-capture disable. Read the capture value in a capture enabled condition. Since the up-counter value
is captured into TC1DRB by the source clock of up-counter after setting TC1CR<ACAP1> to "1". Therefore, to
read the captured value, wait at least one cycle of the internal source clock before reading TC1DRB for the first
time.
(fc = 16 MHz, TBTCR<DV7CK> = “0”)
In the timer mode, the up-counter counts up using the internal clock. When a match between the up-counter
Timer mode
Note:Since the up-counter value is captured into TC1DRB by the source clock of up-counter after setting
TC1CR<ACAP1> to "1". Therefore, to read the captured value, wait at least one cycle of the internal
source clock before reading TC1DRB for the first time.
Resolution
[μs]
128
8.0
0.5
LDW
DI
SET
EI
LD
LD
LD
:
LD
DV7CK = 0
Maximum Time Setting
(TC1DRA), 1E84H
(EIRH). 3
(TC1CR), 00000000B
(TC1CR), 00010000B
(TC1CR), 01010000B
:
WA, (TC1DRB)
32.77 m
0.524
8.39
NORMAL1/2, IDLE1/2 mode
[s]
Page 86
11
[Hz] and generating an interrupt 1 second later
; Sets the timer register (1 s ÷ 2
; IMF= “0”
; Enables INTTC1
; IMF= “1”
; Selects the source clock and mode
; Starts TC1
; ACAP1 ← 1
; Reads the capture value
Resolution
244.14
[μs]
8.0
0.5
DV7CK = 1
Maximum Time Setting
32.77 m
0.524
16.0
[s]
11
/fc = 1E84H)
Resolution
SLOW, SLEEP mode
244.14
[μs]
TMP86FH92DMG
-
-
Setting [s]
Maximum
Time
16.0
-
-