TMP86xy92DMG Toshiba, TMP86xy92DMG Datasheet - Page 200

• Manufacturer Part Number: TMP86xy92DMG
• Manufacturer: Toshiba

Specifications of TMP86xy92DMG

• Package: SSOP30
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 16
• Ram Size: 512
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 6
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 24
• Power Supply (v): 4 to 5.5

18.4
Access to the Flash Memory Area
Example :After sector erasure (E000H-EFFFH), the program in the RAM area writes data 3FH to address E000H.
Example :This write control program reads data from address F000H and stores it to 98H in the RAM area.
; #### Flash Memory Sector Erase Process ####
sLOOP1:
; #### Flash Memory Write Process ####
sLOOP2:
DI
LD
LDW
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
CMP
JR
LD
LD
LD
LD
LD
CMP
JR
LD
JP
LD
LD
(WDTCR2),4EH
(WDTCR1),0B101H
(FLSCR),00111000B
IX,0F555H
IY,0FAAAH
HL,0E000H
(IX),0AAH
(IY),55H
(IX),80H
(IX),0AAH
(IY),55H
(HL),30H
W,(HL)
W,(HL)
NZ,sLOOP1
(IX),0AAH
(IY),55H
(IX),0A0H
(HL),3FH
W,(HL)
W,(HL)
NZ,sLOOP2
(FLSCR),11001000B
XXXXH
A,(0F000H)
(98H),A
Page 186
: Disable interrupts (IMF←"0")
: Clear the WDT binary counter.
: Disable the WDT.
: Enable command sequence execution.
: 1st bus write cycle
: 2nd bus write cycle
: 3rd bus write cycle
: 4th bus write cycle
: 5th bus write cycle
: 6th bus write cycle
: Loop until the same value is read.
: 1st bus write cycle
: 2nd bus write cycle
: 3rd bus write cycle
: 4th bus write cycle, (E000H)=3FH
: Loop until the same value is read.
: Disable command sequence execution.
: Jump to the flash memory area.
: Read data from address F000H.
: Store data to address 98H.
TMP86FH92DMG