LAN9311-NZW Standard Microsystem (Smsc), LAN9311-NZW Datasheet - Page 83

• Manufacturer Part Number: LAN9311-NZW
• Description: Ethernet Switch 2-Port 10Mbps/100Mbps 128-Pin XVTQFP
• Manufacturer: Standard Microsystem (Smsc)

Specifications of LAN9311-NZW

• Package: 128XVTQFP
• Phy/transceiver Interface: MII
• Number Of Primary Switch Ports: 2
• Maximum Data Rate: 100 Mbps
• Internal Memory Buffer Size: 32 KB
• Vlan Support: Yes
• Power Supply Type: Analog
• Minimum Single Supply Voltage: 3 V
• Maximum Single Supply Voltage: 3.6 V
• Maximum Supply Current: 0.295 A
• Maximum Power Dissipation: 1070 mW

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
7.2
To Host MAC
To Port x
Switch Fabric MAC
Functionally, each PHY can be divided into the following sections:
Note 7.1
A block diagram of the Port x PHYs main components can be seen in
Port 1 & 2 PHYs
MDIO
MII
100BASE-TX Transmit
10BASE-T Transmit
PHY Auto-negotiation
HP Auto-MDIX
MII MAC Interface
PHY Management Control
Registers
Interface
PHY Management
Negotiation
Because the Port 1 PHY and Port 2 PHY are functionally identical, this section will describe
them as the “Port x PHY”, or simply “PHY”. Wherever a lowercase “x” has been appended
to a port or signal name, it can be replaced with “1” or “2” to indicate the Port 1 or Port 2
PHY respectively. All references to “PHY” in this section can be used interchangeably for
both the Port 1 & 2 PHYs. This nomenclature excludes the Virtual PHY.
MAC
MII
Auto-
Control
Interrupt Controller
To System
Interrupts
Figure 7.1 Port x PHY Block Diagram
and
and
10BASE-T Receive
100BASE-TX Receive
Transmitter
Reciever
10/100
10/100
DATASHEET
83
To GPIO/LED
Controller
LEDs
HP Auto-MDIX
From
System Clocks Controller
PLL
Figure
TXPx/TXNx
RXPx/RXNx
7.1.
Revision 1.7 (06-29-10)
To External
Port x Ethernet Pins