LAN9311-NZW Standard Microsystem (Smsc), LAN9311-NZW Datasheet - Page 325

no-image

LAN9311-NZW

Manufacturer Part Number
LAN9311-NZW
Description
Ethernet Switch 2-Port 10Mbps/100Mbps 128-Pin XVTQFP
Manufacturer
Standard Microsystem (Smsc)
Datasheet

Specifications of LAN9311-NZW

Package
128XVTQFP
Phy/transceiver Interface
MII
Number Of Primary Switch Ports
2
Maximum Data Rate
100 Mbps
Internal Memory Buffer Size
32 KB
Vlan Support
Yes
Power Supply Type
Analog
Minimum Single Supply Voltage
3 V
Maximum Single Supply Voltage
3.6 V
Maximum Supply Current
0.295 A
Maximum Power Dissipation
1070 mW

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9311-NZW
Manufacturer:
Standard
Quantity:
2
Part Number:
LAN9311-NZW
Manufacturer:
Microchip Technology
Quantity:
10 000
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.5.2.2
BITS
31:8
7
6
5
4
3
2
1
0
RESERVED
RESERVED
Note:
RESERVED
Enable Receive Own Transmit
When set, the switch port will receive its own transmission if it is looped back
from the PHY. Normally, this function is only used in Half Duplex PHY
loopback.
RESERVED
Jumbo2K
When set, the maximum packet size accepted is 2048 bytes. Statistics
boundaries are also adjusted.
RESERVED
Reject MAC Types
When set, MAC control frames (packets with a type field of 8808h) are
filtered. When cleared, MAC Control frames, other than MAC Control Pause
frames, are sent to the forwarding process. MAC Control Pause frames are
always consumed by the switch.
RX Enable
When set, the receive port is enabled. When cleared, the receive port is
disabled.
Port x MAC Receive Configuration Register (MAC_RX_CFG_x)
This read/write register configures the packet type passing parameters of the port.
This bit must always be written as 0.
Register #:
Port0: 0401h
Port1: 0801h
Port2: 0C01h
DESCRIPTION
DATASHEET
325
Size:
32 bits
TYPE
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
Revision 1.7 (06-29-10)
DEFAULT
0b
0b
0b
1b
1b
-
-
-
-

Related parts for LAN9311-NZW