LAN9311-NZW Standard Microsystem (Smsc), LAN9311-NZW Datasheet - Page 346

• Manufacturer Part Number: LAN9311-NZW
• Description: Ethernet Switch 2-Port 10Mbps/100Mbps 128-Pin XVTQFP
• Manufacturer: Standard Microsystem (Smsc)

Specifications of LAN9311-NZW

• Package: 128XVTQFP
• Phy/transceiver Interface: MII
• Number Of Primary Switch Ports: 2
• Maximum Data Rate: 100 Mbps
• Internal Memory Buffer Size: 32 KB
• Vlan Support: Yes
• Power Supply Type: Analog
• Minimum Single Supply Voltage: 3 V
• Maximum Single Supply Voltage: 3.6 V
• Maximum Supply Current: 0.295 A
• Maximum Power Dissipation: 1070 mW

Revision 1.7 (06-29-10)
14.5.2.23
BITS
31:8
6:2
7
1
0
RESERVED
MAC Counter Test
When set, TX and RX counters that normally clear to 0 when read, will be
set to 7FFF_FFFCh when read with the exception of the
Receive Packet Length Count Register
MAC Transmit Packet Length Count Register
and
(MAC_RX_GOODPKTLEN_CNT_x)
7FFF_FF80h.
IFG Config
These bits control the transmit inter-frame gap.
IFG bit times = (IFG Config *4) + 12
Note:
TX Pad Enable
When set, packets shorter than 64 bytes are padded with zeros if needed
and a FCS is appended. Packets that are 60 bytes or less will become 64
bytes. Packets that are 61, 62, and 63 bytes will become 65, 66, and 67
bytes respectively.
TX Enable
When set, the transmit port is enabled. When cleared, the transmit port is
disabled.
Port x MAC Transmit Configuration Register (MAC_TX_CFG_x)
This read/write register configures the transmit packet parameters of the port.
Port x MAC Receive Good Packet Length Count Register
IFG Config values less than 15 are unsupported.
Register #:
Port0: 0440h
Port1: 0840h
Port2: 0C40h
DESCRIPTION
counters which will be set to
DATASHEET
(MAC_RX_PKTLEN_CNT_x),
346
(MAC_TX_PKTLEN_CNT_x),
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Size:
Port x MAC
32 bits
Port x
TYPE
R/W
R/W
R/W
R/W
SMSC LAN9311/LAN9311i
RO
DEFAULT
10101b
Datasheet
0b
1b
1b
-