LAN9311-NZW Standard Microsystem (Smsc), LAN9311-NZW Datasheet - Page 366
LAN9311-NZW
Manufacturer Part Number
LAN9311-NZW
Description
Ethernet Switch 2-Port 10Mbps/100Mbps 128-Pin XVTQFP
Manufacturer
Standard Microsystem (Smsc)
Datasheet
1.LAN9311-NU.pdf
(460 pages)
Specifications of LAN9311-NZW
Package
128XVTQFP
Phy/transceiver Interface
MII
Number Of Primary Switch Ports
2
Maximum Data Rate
100 Mbps
Internal Memory Buffer Size
32 KB
Vlan Support
Yes
Power Supply Type
Analog
Minimum Single Supply Voltage
3 V
Maximum Single Supply Voltage
3.6 V
Maximum Supply Current
0.295 A
Maximum Power Dissipation
1070 mW
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Revision 1.7 (06-29-10)
14.5.2.43
BITS
31:8
7:0
RESERVED
RESERVED
Note:
Port x MAC Interrupt Mask Register (MAC_IMR_x)
This register contains the Port x interrupt mask. Port x related interrupts in the
Pending Register (MAC_IPR_x)
corresponding bit of this register. Clearing a bit will unmask the interrupt. Refer to
Interrupts," on page 49
Note: There are no possible Port x interrupt conditions available. This register exists for future use,
These bits must be written as 11h
and should be configured as indicated for future compatibility.
Register #:
for more information.
Port0: 0480h
Port1: 0880h
Port2: 0C80h
DESCRIPTION
may be masked via this register. An interrupt is masked by setting the
DATASHEET
366
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Size:
32 bits
TYPE
R/W
SMSC LAN9311/LAN9311i
RO
Port x MAC Interrupt
Chapter 5, "System
DEFAULT
11h
Datasheet
-
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