LAN9311-NZW Standard Microsystem (Smsc), LAN9311-NZW Datasheet - Page 59

• Manufacturer Part Number: LAN9311-NZW
• Description: Ethernet Switch 2-Port 10Mbps/100Mbps 128-Pin XVTQFP
• Manufacturer: Standard Microsystem (Smsc)

Specifications of LAN9311-NZW

• Package: 128XVTQFP
• Phy/transceiver Interface: MII
• Number Of Primary Switch Ports: 2
• Maximum Data Rate: 100 Mbps
• Internal Memory Buffer Size: 32 KB
• Vlan Support: Yes
• Power Supply Type: Analog
• Minimum Single Supply Voltage: 3 V
• Maximum Single Supply Voltage: 3.6 V
• Maximum Supply Current: 0.295 A
• Maximum Power Dissipation: 1070 mW

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
10
11
1
2
3
4
5
6
7
8
9
-
-
-
-
X
X
1
1
0
0
0
0
0
0
0
0
0
0
0
register. When Auto-negotiation is enabled and the MANUAL_FC_x bit is cleared, the switch port flow
control enables during full-duplex are determined by Auto-negotiation.
Note: The flow control values in the
Note 6.1
Note 6.2
X
X
0
0
1
1
1
1
1
1
1
1
1
1
1
(PHY_AN_AD V_ x)
(VPHY_AN_ADV)
Section 7.2.5.1, "PHY Pause Flow Control," on page 92
Pause Flow Control," on page 98
control settings respectively.
X
X
X
X
0
1
1
1
1
1
1
1
1
1
1
If Auto-negotiation is enabled and complete, but the link partner is not Auto-negotiation
capable, half-duplex is forced via the parallel detect function.
For the Port 1 and Port 2 PHYs, these are the bits from the
Advertisement Register (PHY_AN_ADV_x)
Base Page Ability Register
are the local/partner swapped outputs from the bits in the
Advertisement Register (VPHY_AN_ADV)
Base Page Ability Register
"Virtual PHY Auto-Negotiation," on page 96
X
X
X
X
X
0
1
1
1
1
1
1
1
1
1
Table 6.1 Switch Fabric Flow Control Enable Logic
Half (
Half
Half
Half
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
are not affected by the values of the manual flow control register. Refer to
Note
X
an d
6.1)
DATASHEET
Virtual PHY Au to -N egotia tio n Advertisement Register
(PHY_AN_LP_BASE_ABILITY_x). For the Virtual PHY, these
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
(VPHY_AN_LP_BASE_ABILITY). Refer to
59
for additional information on PHY and Virtual PHY flow
Port x PHY Auto-Negotiation Advertisement Register
X
X
X
X
X
X
X
X
0
1
1
1
0
1
1
and
and
for more information.
Virtual PHY Auto-Negotiation Link Partner
Port x PHY Auto-Negotiation Link Partner
X
X
X
X
X
X
X
X
0
1
1
0
1
0
0
and
Section 7.3.1.3, "Virtual PHY
Virtual PHY Auto-Negotiation
Port x PHY Auto-Negotiation
X
X
X
X
X
X
X
X
X
X
X
0
1
0
1
Revision 1.7 (06-29-10)
RX_FC_x
RX_FC_x
0
0
0
0
0
0
0
0
0
0
1
0
1
Section 7.3.1,
BP_EN_x
BP_EN_x
BP_EN_x
BP_EN_x
TX_FC_x
TX_FC_x
0
0
0
0
1
0
1
0
0