LAN9311-NZW Standard Microsystem (Smsc), LAN9311-NZW Datasheet - Page 208
LAN9311-NZW
Manufacturer Part Number
LAN9311-NZW
Description
Ethernet Switch 2-Port 10Mbps/100Mbps 128-Pin XVTQFP
Manufacturer
Standard Microsystem (Smsc)
Datasheet
1.LAN9311-NU.pdf
(460 pages)
Specifications of LAN9311-NZW
Package
128XVTQFP
Phy/transceiver Interface
MII
Number Of Primary Switch Ports
2
Maximum Data Rate
100 Mbps
Internal Memory Buffer Size
32 KB
Vlan Support
Yes
Power Supply Type
Analog
Minimum Single Supply Voltage
3 V
Maximum Single Supply Voltage
3.6 V
Maximum Supply Current
0.295 A
Maximum Power Dissipation
1070 mW
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Revision 1.7 (06-29-10)
14.2.5.7
31:16
BITS
15:0
Sequence ID (SEQ_ID)
This field contains the Sequence ID from the 1588 Sync or Delay_Req
packet.
Source UUID High (SRC_UUID_HI)
This field contains the high 16-bits of the Source UUID from the 1588 Sync
or Delay_Req packet.
(1588_SEQ_ID_SRC_UUID_HI_TX_CAPTURE_x)
Port x 1588 Sequence ID, Source UUID High-WORD Transmit Capture Register
Note: The selection between Sync or Delay_Req packets is based on the corresponding
Note: There are multiple instantiations of this register, one for each port of the LAN9311/LAN9311i.
Note: For Port 0(Host MAC), receive is defined as data from the switch fabric, while transmit is to
master/slave bit in the
Refer to
the switch fabric.
Offset:
Section 14.2.5
Port 1: 118h
Port 2: 138h
Port 0: 158h
DESCRIPTION
1588 Configuration Register
for additional information.
DATASHEET
208
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Size:
(1588_CONFIG).
32 bits
TYPE
SMSC LAN9311/LAN9311i
RO
RO
DEFAULT
0000h
0000h
Datasheet
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