LAN9311-NZW Standard Microsystem (Smsc), LAN9311-NZW Datasheet - Page 30

• Manufacturer Part Number: LAN9311-NZW
• Description: Ethernet Switch 2-Port 10Mbps/100Mbps 128-Pin XVTQFP
• Manufacturer: Standard Microsystem (Smsc)

Specifications of LAN9311-NZW

• Package: 128XVTQFP
• Phy/transceiver Interface: MII
• Number Of Primary Switch Ports: 2
• Maximum Data Rate: 100 Mbps
• Internal Memory Buffer Size: 32 KB
• Vlan Support: Yes
• Power Supply Type: Analog
• Minimum Single Supply Voltage: 3 V
• Maximum Single Supply Voltage: 3.6 V
• Maximum Supply Current: 0.295 A
• Maximum Power Dissipation: 1070 mW

Revision 1.7 (06-29-10)
122,125
25,26,
28-32,
34-38,
45,47,
49-53,
41-44
55,56
PIN
120
121
118
PIN
57
58
59
Analog Power
+3.3V Master
+1.8V Power
+1.8V Power
+3.3V Port 2
Read Strobe
Write Strobe
Bias Power
Chip Select
Transmitter
Transmitter
Host Bus
Host Bus
Address
Supply
Supply
Supply
Supply
NAME
NAME
Port 2
Port 1
Data
Table 3.3 LAN Port 1 & 2 Power and Common Pins (continued)
VDD33BIAS
VDD18TX2
VDD18TX1
VDD33A2
SYMBOL
SYMBOL
D[15:0]
A[9:1]
nWR
nRD
nCS
Table 3.4 Host Bus Interface Pins
DATASHEET
BUFFER
BUFFER
TYPE
TYPE
IS/O8
IS
IS
IS
IS
P
P
P
P
30
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
+3.3V Port 2 Analog Power Supply
Refer to the LAN9311/LAN9311i application note
for additional connection information.
+3.3V Master Bias Power Supply
Refer to the LAN9311/LAN9311i application note
for additional connection information.
Port 2 Transmitter +1.8V Power Supply: This pin
is supplied from the internal PHY voltage regulator.
This pin must be tied to the VDD18TX1 pin for
proper operation.
Refer to the LAN9311/LAN9311i application note
for additional connection information.
+1.8V Port 1 Transmitter Power Supply: This pin
must be connected directly to the VDD18TX2 pin
for proper operation.
Refer to the LAN9311/LAN9311i application note
for additional connection information.
Host Bus Data: Bits 15-0 of the Host Bus data
port.
Note:
Host Bus Address: 9-bit Host Bus Address Port
used to select Internal CSR’s and TX and RX
FIFO’s.
Note:
Read Strobe: Active low strobe to indicate a read
cycle. This signal is qualified by the nCS chip
select.
Write Strobe: Active low strobe to indicate a write
cycle. This signal is qualified by the nCS chip
select.
Chip Select: Active low signal used to qualify read
and write operations.
Big and little endianess is supported.
The A0 bit is not used because the
LAN9311/LAN9311i must be accessed on
WORD boundaries.
DESCRIPTION
DESCRIPTION
SMSC LAN9311/LAN9311i
Datasheet